AN 114: Board Design Guidelines for Altera® Programmable Device Packages

Download PDF
ID 683481
Date 4/25/2025
Public
Document Table of Contents
Document Table of Contents x
1. AN 114: Board Design Guidelines for Altera® Programmable Device Packages
1. AN 114: Board Design Guidelines for Altera® Programmable Device Packages x
1.1. Overview of BGA Packages 1.2. PCB Layout Terminology 1.3. PCB Layout for High-Density BGA Packages 1.4. Document Revision History for AN 114: Board Design Guidelines for Altera® Programmable Device Packages
1.2. PCB Layout Terminology x
1.2.1. Escape Routing 1.2.2. Multi-Layer PCBs 1.2.3. Vias 1.2.4. Via Capture Pad 1.2.5. Surface Land Pad 1.2.6. Stringer
1.2.5. Surface Land Pad x
1.2.5.1. Non Solder Mask Defined Pad 1.2.5.2. Solder Mask Defined Pad
1.3. PCB Layout for High-Density BGA Packages x
1.3.1. Surface Land Pad Dimension 1.3.2. Via Capture Pad Layout and Dimension 1.3.3. Signal Line Space and Trace Width 1.3.4. Number of PCB Layers
1.3.4. Number of PCB Layers x
1.3.4.1. Sample PCB Layout for 1.00-mm Flip-Chip BGA and 0.80-mm UBGA (BT Substrate) 1.3.4.2. Sample PCB Routing Scheme on 6 Layers for 0.5-mm 484-pin MBGA 1.3.4.3. Sample PCB Routing Scheme on 3 Layers for 0.5-mm 383-pin MBGA 1.3.4.4. Sample PCB Routing Scheme on 2 Layers for 0.5-mm 153-pin MBGA 1.3.4.5. Sample PCB Routing Scheme on 4 Layers for 0.5-mm 144-pin MBGA 1.3.4.6. Sample PCB Routing Scheme on 2 Layers for 0.5-mm 256-pin and 100-pin MBGAs 1.3.4.7. Sample PCB Routing Scheme on 4 Layers for 0.4-mm 81-pin VBGA (also known as WLCSP) 1.3.4.8. Sample PCB Routing Scheme on 8 Layers for 610-pin VPBGA 1.3.4.9. Sample PCB Routing Scheme on 2 Layers for 0.5-mm 68-pin MBGA 1.3.4.10. Sample PCB Routing Scheme on 2 Layers for 0.4-mm 36-pin VBGA (also known as WLCSP) 1.3.4.11. Sample PCB Routing Scheme on 3 Layers for 0.8-mm 324-pin UBGA 1.3.4.12. Sample PCB Routing Scheme on 3 Layers for 0.8-mm 169-pin UBGA 1.3.4.13. Sample PCB Routing Scheme on 2 Layers for 0.5-mm 301-pin MBGA
1. AN 114: Board Design Guidelines for Altera® Programmable Device Packages

1. AN 114: Board Design Guidelines for Altera® Programmable Device Packages

As programmable logic devices (PLDs) increase in density and I/O pins, the demand for small packages and diverse packaging options continues to grow. Ball-grid array (BGA) packages are an ideal solution because the I/O connections are on the interior of the device, improving the ratio between pin count and board area. Typical BGA packages contain between two to eight more connections as quad flat pack (QFP) packages. Furthermore, BGA solder balls are considerably stronger than QFP leads, resulting in robust packages that can tolerate rough handling.

This application note provides the recommended PCB design guidelines for some of the more complex package options offered for Altera® programmable devices except for Stratix® 10 devices and beyond.

Note: For more information about Stratix® 10 device packages and beyond, refer to the respective individual Manufacturing Advantage Services (MAS) Guidelines document.

Section Content
Overview of BGA Packages
PCB Layout Terminology
PCB Layout for High-Density BGA Packages
Document Revision History for AN 114: Board Design Guidelines for Altera Programmable Device Packages

Related Information
Level Two Title